RISC-V (pronounced “risk-five”) is an open-source instruction set architecture (ISA) used to develop custom processors targeting various end applications. It was originally established as an alternative to proprietary architectures, such as those offered by Intel and ARM. Due to its openness and technical merits, it has become increasingly popular in recent years.
In this IT guide, we’ll summarize its most salient points, including detailing its potential use case for managing IoT endpoints.
What is RISC-V?
RISC-V stands for Reduced Instruction Set Computing, and the “V” represents the fifth iteration of the RISC architecture. It was originally proposed and developed in the 1980s at the University of California, Berkeley, and Stanford University. It was intended to address perceived complexities and inefficiencies of CISC, or the “Complex Instruction Set Computer”.
CISC relied too heavily on dense instruction sets to implement several operations simultaneously. IT experts noticed that the CISC compilers inevitably used a small subset of these complex instruction sets. This, among other things, led to researchers questioning the need for a larger instruction set focused on simplicity to improve operational efficiency.
The difference between RISC vs. CISC
RISC is designed to resolve CISC’s shortcomings while still being open-sourced. Generally, CISC CPUs have a few registrars and extensive instructions, most of which have access to memory. In contrast, RISC CPUs have multiple registrars but only a modest instruction set, with access to memory restricted to only a few load instructions.
Fun fact: Professor David Patterson at the University of California, Berkeley, and Professor John Hennesy at Stanford University received the ACM A.M. Turing Award in 2017 for their work on the RISC architecture.
| CISC | RISC | |
| Instructions per cycle | Larger and with variable length | Smaller with fixed length |
| Instruction complexity | Complex and versatile | Simple and more standard |
| Instruction execution | Several cycles | Single cycle |
| Memory access and use | Higher memory use | More efficient use of memory |
How does RISC-V work?
Unlike proprietary architectures, RISC-V is open-sourced, which means anyone can implement it without licensing fees (the open source itself is the license). The open nature of RISC-V is arguably its most appealing feature and why it has gained so much traction today.
But RISC-V also has many advantages. At its core, an ISA defines the interface between software and hardware, dictating how a processor executes instructions. As mentioned earlier, RISC-V emphasizes simplicity and efficiency in instruction execution—offering multiple use cases from academia to aerospace and government to IoT endpoint management.
As the fifth generation of a specific ISA, RISC-V is a seasoned architecture that attempts to make it much easier and simpler to use. Compared to traditional incremental ISAs, it was designed to be a modular ISA. This means that RISC-V implementation comprises a mandatory base ISA and several ISA extensions, allowing customization of CPUs based on the application’s needs.
RISC-V is maintained by the RISC-V International, a nonprofit organization that oversees its development and evolution. One of its primary goals is to keep the design of RISC-V simple, reliable, and available to all rather than considering the ISA for commercial purposes.
The importance of RISC-V
RISC-V is a highly popular ISA, and it’s easy to see why. Its open architecture fosters collaboration among a wide range of contributors and encourages the development of customized processes. This, in turn, promotes a highly modular ecosystem. RISC-V promises endless use cases and applications, from handling complex computational tasks to offering higher reliability and security for complex, high-data applications. This makes RISC-V incredibly scalable and flexible.
Moreover, the lack of licensing fees has significant economic implications. Companies of all sizes can implement RISC-V without being burdened with licensing fees. This accessibility has contributed to democratizing processor designs, enabling and encouraging innovators to contribute to RISC-V’s advancements.
Lastly, RISC-V is important because of its potential implications for future technologies and ISAs. RISC-V could provide a foundation for building accelerated processors as the demand for specialized and domain-specific architectures grows.
RISC-V and IoT endpoints
RISC-V is a disruptor in the world of computer architecture, offering revolutionary accelerators for artificial intelligence, machine learning, and other emerging technologies. One potential application is the efficient management of IoT devices.
A study suggested that a RISC-V-based processing core architecture with DSP extensions improved the speed of IoT management by 37% for general-purpose applications. This increased by 2.3x with vector extensions.
As seen in the paper, “Multi-core implementations feature significantly fewer shared memory contentions with the new ISA-extensions, allowing a four-core implementation to outperform a single-core implementation by 3.9x while consuming only 2.4x more power. Implemented in an advanced 28nm technology, we observe a 5x energy efficiency gain when processing near-threshold at 0.46V where the cluster is achieving 0.2 GOPS while consuming only 1 mW. The makes [RISC-V] attractive for a wide range of IoT applications.”
The benefits of RISC-V
RISC-V provides simplified instructions to accomplish various tasks. Compared to CISC, it allows IT professionals to perform more actions without overloading memory. Other benefits include:
- Its open-sourced nature which fosters collaboration and innovation across the industry
- Availability of smaller, more energy-efficient options
- RISC-V can be customized to your specific requirements
- The presence of multiple security features through open-source reference designs, software composition analysis tools, and security extensions
In contrast, the main disadvantage to RISC-V designs is that its PPA (power, performance, and area) requirements are quite demanding. It would need industry-leading and state-of-the-art automation tools and methodologies if it is intended for high-end applications.
RISC-V applications
Multiple industries can use RISC-V, though it provides most usage in these market segments:
- IP providers who want to offer custom designs
- System-on-chip (SoC) teams using commercial IP
- Software vendors building specialized, RISC-V processor-based SoCs.
These markets may find RISC-V useful for:
- Space-limited and battery-operated designs, such as home appliances and wearables
- High-performance computing (HPC) and data centers
- Larger SoC applications
For more information and to see other use cases, you can check out the RISC-V Exchange, a community forum that details various hardware, software, services, and learning offerings in RISC-V.
The future of RISC-V
With RISC-V offering a greater range of performance and a rapidly expanding ecosystem, it’s safe to assume that the market demand for RISC-V will continue to grow. While most current RISC-V use cases are for smart appliances, it is conceivable to see its future adoption in application processors that include compilers, firmware, and high-level programming languages.
